44 lines
2.1 KiB
Diff
44 lines
2.1 KiB
Diff
From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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Date: Sat, 29 Jan 2022 11:26:58 +0100
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Subject: riscv: adjust -march flags for binutils 2.38
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As of version 2.38 binutils defaults to ISA specification version
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2019-12-13. This version of the specification has has separated the
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the csr read/write (csrr*/csrw*) instructions and the fence.i from
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the I extension and put them into separate Zicsr and Zifencei
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extensions.
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This implies that we have to adjust the -march flag passed to the
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compiler accordingly.
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Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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Origin: https://lists.gnu.org/archive/html/grub-devel/2022-01/msg00173.html
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---
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configure.ac | 8 ++++++++
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1 file changed, 8 insertions(+)
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diff --git a/configure.ac b/configure.ac
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index 7517fc4..e3d4d72 100644
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--- a/configure.ac
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+++ b/configure.ac
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@@ -852,11 +852,19 @@ if test x"$platform" != xemu ; then
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CFLAGS="$TARGET_CFLAGS -march=rv32imac -mabi=ilp32 -Werror"
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AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[]])],
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[grub_cv_target_cc_soft_float="-march=rv32imac -mabi=ilp32"], [])
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+ # ISA spec version 20191213 factored out extensions Zicsr and Zifencei
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+ CFLAGS="$TARGET_CFLAGS -march=rv32imac_zicsr_zifencei -mabi=ilp32 -Werror"
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+ AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[]])],
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+ [grub_cv_target_cc_soft_float="-march=rv32imac_zicsr_zifencei -mabi=ilp32"], [])
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fi
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if test "x$target_cpu" = xriscv64; then
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CFLAGS="$TARGET_CFLAGS -march=rv64imac -mabi=lp64 -Werror"
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AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[]])],
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[grub_cv_target_cc_soft_float="-march=rv64imac -mabi=lp64"], [])
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+ # ISA spec version 20191213 factored out extensions Zicsr and Zifencei
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+ CFLAGS="$TARGET_CFLAGS -march=rv64imac_zicsr_zifencei -mabi=lp64 -Werror"
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+ AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[]])],
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+ [grub_cv_target_cc_soft_float="-march=rv64imac_zicsr_zifencei -mabi=lp64"], [])
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fi
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if test "x$target_cpu" = xia64; then
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CFLAGS="$TARGET_CFLAGS -mno-inline-float-divide -mno-inline-sqrt -Werror"
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